In color liquid crystal display devices, the number of gray-scale levels to be displayed has been increasing in recent years. For example, the display device of 260 thousand colors by six bits is now being replaced with that of six million seven hundred thousand colors by eight bits. Even a display device capable of displaying ten billion colors by 10 bits is now on the market. Under these circumstances, the gray scale power supply is one of critical fundamental circuits which generate voltage adjusted to the characteristic of each particular liquid crystal panel.
In general, a six-bit product has five positive side amplifiers and five negative side amplifiers, whilst an eight bit product has nine positive side amplifiers and nine negative side amplifiers. These amplifiers are designed to achieve the power supply efficiency and are able to output the voltage up to the vicinity of the power supply voltage or up to the vicinity of the GND (ground) voltage.
Although the wide spread use is made of a dedicated IC of the gray scale power supply, there is a case wherein the gray scale power supply is provided in an LCD driver. In this case, since an amplifier needs to be composed by a CMOS, the margin of driving capability has not sufficient margin, and hence circuit-design skills and techniques are required.
Referring to FIG. 5, there is shown a conventional typical LCD source driver including a data register 1 for sampling 6-bit digital display signals R, G and B, a latch circuit 2 for latching 6-bit digital signals in synchronization with a strobe signal ST, a D/A converter 3 which is made up by N pieces of digital-to-analog converters connected in parallel, a liquid crystal gray scale voltage generating circuit 4 which has a gamma-conversion characteristic adjusted to the liquid crystal characteristic, and N voltage followers 5 for buffering the voltage from the D/A converter 3.
An LCD panel includes a plurality of thin film transistors (TFTs) 6 and a plurality of pixel capacitors 7. Each thin film transistor is provided at an intersection of a data line and a scanning line and has a gate and a source connected to the scanning line and to the data line, respectively, and each pixel capacitor has its one terminal and its other terminal connected to the drain of the associated TFT and to a COM terminal, respectively. In FIG. 5, the configuration for one row of the LCD panel is schematically shown. That is, the LCD panel includes, in actuality, a plural number of rows (M rows), each made up of N thin film transistors (TFTs). An LCD gate driver, not shown, sequentially drives gates of the TFTs in the respective lines. The D/A converter 3 D/A converts the 6-bit digital display signals output from the latch circuit 2 to analog signals to supply the resulting analog signals to the inputs of the N voltage followers 5-1 to 5-N. The output signals from the voltage followers 5-1 to 5-N are supplied through the TFTs 6-1 to 6-N, respectively, to liquid crystal elements, operating as pixel capacitors 7-1 to 7-N, respectively.
The liquid crystal gray scale voltage generating circuit 4 generates a plurality of reference voltages. The D/A converter 3 receives reference voltages and selects a reference voltage by a decoder formed by e.g. a ROM switch, not shown. The liquid crystal gray scale voltage generating circuit 4 includes e.g. a resistor ladder circuit, which are driven by voltage followers to decrease the impedance at each reference voltage point and to carry out fine adjustment of the reference voltage.
FIG. 6 is a diagram illustrating the configuration of a liquid crystal gray scale voltage generating circuit in which a resistor ladder circuit is driven by voltage followers (see Patent Documents 1 and 2). Referring to FIG. 6, the liquid crystal gray scale voltage generating circuit includes a resistor ladder circuit 10 (resistors R1, R2, . . . , Rn−2, and Rn−1), provided in an LCD driver, an external resistor ladder circuit 30 (resistors R1′, R2′, . . . , Rn−2′, and Rn−1′), a buffer amplifier unit 20 which are made up by n voltage followers which receive respective tap voltages of the external resistor ladder circuit 30 to output reference voltages V1 to Vn, and a constant voltage generator (Vr) 40. The n voltage followers of the buffer amplifier unit 20 are composed by OP amps(operational amplifiers) OP1, OP2, . . . OPn−1, and Opn. The ladder resistors R1′, R2′, . . . , Rn−2′, and Rn−1′ of the external resistor ladder circuit 30 are variable resistors for performing the adjustment of the voltage values supplied to the OP amps OP1, OP2, . . . OPn−1, and OPn. The adjustment of the voltage values is performed so that they becomes optimal to the characteristic of the liquid crystal panel.
In the liquid crystal gray scale voltage generating circuit, shown in FIG. 6, the reference supply voltages are the ground voltage GND and Vr. This reference supply voltage Vr is supplied by a constant voltage source 40, such as band-gap-reference voltage generator, which is provided outside the gray scale voltage generating circuit. The gray scale voltages Vn, Vn−1, Vn−2, . . ., V2, and V1 are ultimately determined by the ladder resistors R0′, R1′, R2′, . . . , Rn−2′, and Rn−1′.
That is,Vn=Vr.Vn−1=Vr{(Rn−2′+Rn−3′+ . . . +R0′)/(Rn−1′+Rn−2′+Rn−3′ . . . +R0′)}V1=Vr{R0′/(Rn−1′+Rn−2′+Rn−3′+ . . . +R0′)}
It is noted that, in case the resistance ratio of the ladder resistors R1, R2, . . . , Rn−2, and Rn−1, which are for internally determining the gray scale voltage, is equal to the resistance ratio of the ladder resistors R1′, R2′, . . . , Rn−2′, and Rn−1′, which are for externally determining the gray scale voltage, output currents of respective OP amps OP1, OP2, . . . and OPn−1 are zero.
However, the output current In of the n'th OP amp OPn, as counted from the GND side, is given in the source direction by the following equation (1):In=(Vn−V1)/(R1+R2+ . . . +Rn−1)=Io  (1)
On the other hand, the output current I1 of the first OP amp OP1, as counted from the GND side, is given in the sink direction by the following equation (2):I1=(Vn−V1)/(R1+R2+ . . . +Rn−1)=Io  (2)
Thus, there is a problem in the liquid crystal gray scale voltage generating circuit, shown in FIG. 6, that the output dynamic ranges of the OP amps OPn and OP1 are reduced due to the source output current In of the OP amp OPn and the sink output current I1 of the OP amp OP1, as indicated by the equations (1) and (2), respectively.
For solving the problem, the present Assignee has proposed the configuration shown in FIG. 7 or 8 in the Patent Document 2.
Specifically, an auxiliary resistor Rn is connected between a high voltage power supply terminal VDD and a ladder resistor Rn−1, whilst an auxiliary resistor R0 is connected between a low voltage power supply terminal GND and a ladder resistor R1, as shown in FIG. 7A. In other respects, the configuration is the same as that of FIG. 6. With the configuration of FIG. 7A, the source current of the voltage follower OPn on the high voltage power supply terminal VDD side is adjusted by the resistor Rn, whilst the sink current of the voltage follower OP1 on the low voltage power supply terminal GND side is adjusted by the resistor R0.
Auxiliary current sources I0 and In are provided in place of the auxiliary resistors R0 and Rn, respectively, as shown in FIG. 8A. It is noted that the auxiliary current sources I0 and In are set for satisfying the equations (1) and (2), respectively. With this circuit configuration, the source current and the sink current of the OP amps OPn and OP1 are made zero to enhance the output dynamic range, thereby facilitating the circuit design of the output stage in the OP amps.
[Patent Document 1]
JP Patent Kokai Publication No. JP-A-6-348235
[Patent Document 2]
JP Patent Kokai Publication No. JP-A-10-142582